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sdram 时钟相位-ag凯发k8国际

发布时间:2024/4/13 编程问答 18 豆豆
ag凯发k8国际 收集整理的这篇文章主要介绍了 sdram 时钟相位_stm32f429主频大于160mhz时,sdram数据不稳定 小编觉得挺不错的,现在分享给大家,帮大家做个参考.

stm32f429主频为180mhz, sdramz做lcd缓存时,刷完一帧图片,部分像素点颜色发送了变化,如下图。但将主频设置为160mhz时图片显示又很稳定,后来测试了一下sdram,发现主频大于160m,并且随着主频的增大,sdram的数据越不稳定。而160m时数据又很稳定,有没有人遇到这样的问题呢?会不会是sdram的布线不好引起的?

sdram配置如下:

[mw_shl_code=c,true]/* fmc sdram bank configuration */

/* timing configuration for 90 mhz of sd clock frequency (180mhz/2) */

/* tmrd: 2 clock cycles */

fmc_sdramtiminginitstructure.fmc_loadtoactivedelay = 2;

/* txsr: min=70ns (7x11.11ns) */

fmc_sdramtiminginitstructure.fmc_exitselfrefreshdelay = 7;

/* tras: min=42ns (4x11.11ns) max=120k (ns) */

fmc_sdramtiminginitstructure.fmc_selfrefreshtime = 4;

/* trc: min=70 (7x11.11ns) */

fmc_sdramtiminginitstructure.fmc_rowcycledelay = 7;

/* twr: min=1 7ns (1 1x11.11ns) */

fmc_sdramtiminginitstructure.fmc_writerecoverytime = 2;

/* trp: 20ns => 2x11.11ns */

fmc_sdramtiminginitstructure.fmc_rpdelay = 2;

/* trcd: 20ns => 2x11.11ns */

fmc_sdramtiminginitstructure.fmc_rcddelay = 2;

/* fmc sdram control configuration */

fmc_sdraminitstructure.fmc_bank = fmc_bank2_sdram;

/* row addressing: [7:0] */

fmc_sdraminitstructure.fmc_columnbitsnumber = fmc_columnbits_number_8b;

/* column addressing: [11:0] */

fmc_sdraminitstructure.fmc_rowbitsnumber = fmc_rowbits_number_12b;

fmc_sdraminitstructure.fmc_sdmemorydatawidth = sdram_memory_width;

fmc_sdraminitstructure.fmc_internalbanknumber = fmc_internalbank_number_4;

fmc_sdraminitstructure.fmc_caslatency = sdram_cas_latency;

fmc_sdraminitstructure.fmc_writeprotection = fmc_write_protection_disable;

fmc_sdraminitstructure.fmc_sdclockperiod = sdclock_period;

fmc_sdraminitstructure.fmc_readburst = sdram_readburst;

fmc_sdraminitstructure.fmc_readpipedelay = fmc_readpipe_delay_1;

fmc_sdraminitstructure.fmc_sdramtimingstruct = &fmc_sdramtiminginitstructure;[/mw_shl_code]

bd1fa35bcce5b69d939ec48de2ffbbe3_15.jpg (0 bytes, 下载次数: 15)

2010-12-14 22:54 上传

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